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Full-time Lead ASIC Physical design Engineer

at KBS Consultants in Chennai

Lead ASIC Physical design Engineer
Job Description Lead - PHYSICAL DESIGN Will be responsible for execution of Full chip floor planning and block level physical design activities for a given ASIC product, which includes: floor planning, placement, scan-reordering, clock tree synthesis, in Place optimization, routing, timing analysis/closure and ECO tasks (timing, functional, noise based ECOs), design rule checks (DRC), and Layout vs. Schematic (LVS) checks.
In addition to this, He/She will also be participating in Physical design Flow development/upgrade by continuously working with the internal design teams and CAD vendors .
Requirements: Minimum 3 - 8 years of ASIC physical design experience.
Expertise in ASIC Physical Design: Floor planning, Clock Tree Synthesis, P & R extraction, IR Drop Analysis, timing and Signal Integrity closure.
Hands on experience in Blast Fusion, Talus- magma tools will be plus Participated in a minimum of 2- 4 fullchip tapeouts will be a plus.
Scripting Language with PERL, TCL, AWK, shell scripting is highly desirable.
Familiar with Physical Verification (calibre) will be a plus.

Email your resume to kbschennai@kbsconsultants.com


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Published at 27-03-2014
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