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Full-time Physical Design-Backend

at KBS Consultants in Chennai

Physical Design-Backend

Job Description: Physical Design-backend Strong Knowledge in timing / timing closure activities along with full design implementation experience. Exposure in low-power implementation Very good communication
Experience: 7-10 yrs

Physical Design Engineer 3 - 4 Years
Job Description:
Creates bottoms-up elements of chip design including but not limited to: FET, cell, and block-level custom layouts, FUB-level floor plans, abstract view generation, RC extraction, and schematic-to-layout verification and debug using phases of physical design development including parasitic extraction, static timing, wire load models, clock generation, custom polygon editing, auto-place and route algorithms, floor planning, full-chip assembly, packaging, and verification.
Troubleshoots design issues and applies proactive intervention.
May schedule staffing, execution, and verification of complex chips development and execution of project methodologies and/or flow developments.
Additional qualifications include: - Proficiency in multiple levels of layout design which includes data path, register files, and standard cell designs
Proficiency in floor planning activities which include FUB-unit level assembly, routing, and integration of custom blocks in to the FC floorplan Ability to comprehend issues of RC delay, electro-migration, self-heating, and cross capacitance
Ability to recognize failure prone layout structures, and proactively contact engineers for guidance and produce electrically robust layout Engineering Design, R & D

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Published at 27-03-2014
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